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The VME bus is a scalable backplane bus interface. The tables below detail the required control signals to produce the different bus widths. Three main types of cards reside on the VME bus. The Controller, which supervises bus activity. The Controller also handles Interrupts on the bus. When an Interrupt is received on one of the IRQ lines the Controller will process that Interrupt by accessing the Interrupting card, and acknowledge the Interrupt.
Only one Controller may reside on the VME bus. Any number of bus Masters may reside on the VME bus, but only one may have control of the bus at any one time.
The bus Master continues to control the Data bus during either interface. The Interrupts are acknowledged by the bus Controller. Revision C allowed 64 bit Data transfers, with the upper 32 data bits being multiplexed onto the address bus once the address cycle was complete after the address was broadcast during Block Transfers BLT.
How ever the 5 row connectors are only required for the 64x enhancement, moving to VME again only requires the 3 rows 96 pin. There are a number of other specifications which increase the data through-put even higher by using the "user defined" P2 pins, the P0 connector or by bringing the data out the front panel.
There are a number of others. Refer to the link "P2 Add-on" bus at the top of the page. A single cycle consists of the Master performing an Address cycle followed by a single Data transfer cycle. A block transfer cycle consists of the Master performing a single Address cycle followed by up to data cycles. A Block Transfer consists of up to a Byte transfers. Block Transfers increase the though-put of the bus by reducing the over head.